CV for Te Cheng Tseng

Intro

What I am all about.

I'm Te Cheng Tseng, I have a strong sense of responsibility to complete a job. I have over nine years experience in FPGA programming for several applications since college, and work well with other coworkers.

I designed FPGA for "smart camera", "EtherCat device", "TSN endpoint card", "High speed PCIe I/O cards" and "PCI motion control cards". The develop process follow customized CI flow with GitLab, Jenkins and auto build servers for 3 mainly FPGA Vendor 4 EDA-tool types.

VHDL 76%

Verilog 90%

C 65%

Experience

Batman would be jealous.

FPGA

Architecture design and implement of FPGA for measurement, automation, smart factory, motion, vision...

*Include OS porting for SoC type FPGA.

Network

EtherNet, EtherCat, MDIO for PHY control, TSN, IEEE1588, 802.1AS, 802.1Qbv...

Smart Camera

Test, verify, sensor tuning....*Include EMVA1288, GenTL

Real time image processing :

Gain, offset, dead pixel correct, PRNU correct, dark level, LUT, shadding, white balance(auto)...

Embbeded System

FPGA, MCU, Hardware design and integrated

OS porting or bare metal with customized driver

Interface Transfer

Protocal design and implemented.

Customized DDR, PCI/PCIe, I2c, SMbus, SPI, AXI, AXI-stream, GPIB, LVDS, MIPI....

Continuous Integration

1. GitLab server : Source & version control.

2. Jenkins server : Controler for auto build and test.

3. Build server : Executor for auto build and test.

Xilinx: ISE, Vivado

Altera/Intel: Quartus

Lattice: Diamond

Side Projects

I build the real value.

Contacts

Hire me.

Location

Taipei, Taiwan

Phone

+886 920 140 013

Email

adenrex@gmail.com

Te Cheng Tseng